1

Introduction to programmable devices (FPGA, CPLD), Hardware Description Language (VHDL), and the use programming tool.

VLSI Trainer
Model VLSI100G

FPGA Based with All Hardware, Software and Experiments Source Codes

2

Implementation of basic logic gates and its testing.

3

Implementation of adder circuits and its testing.

4

Implementation 4 to 1 multiplexer and its testing.

5

Implementation of 3 to 8 decoder and its testing.

6

Implementation of 8 to 3 priority encoder and its testing.

7

Implementation of J-K and D Flip Flops and its testing.

8

Implementation of sequential adder and its testing.

9

Implementation of BCD counter and its testing.

10

Implementation of two 8-bit multiplier circuit and its testing.

11

Simulation of CMOS Inverter using SPICE for transfer characteristic.

12

Simulation and verification of two input CMOS NOR gate using SPICE.

13

Implementation and simulation of given logic function using dynamic logic.

14

To generate layout for CMOS Inverter circuit and simulate it for verification.

15

To prepare layout for given logic function and verify it with simulations.

16

To measure IDS – VGS  and IDS – VDS characteristics of given n-channel and p-channel MOSFETs.

17

To measure propagation delay of a given CMOS Inverter circuit.