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BE - IT- Semester 6 - Embedded & VLSI Design - 2160709
Sr.

Computer Network Trainers

Pdf Specs
1

Flash/toggle/on-off single LED.

VLSI Trainer
Model VLSI100N

FPGA Based with All Hardware, Software and Experiments Source Codes
2

Alternate ON-OFF eight LEDs.
3

Display 0 to 9 on segment
4

Multiplexed 4 7-segment
5

Transmit “Hello World!” serially and display
6

Display the string on LCDEx.; “Hello World”
7

Press any key from 4*4 keypad and display on LCD
8

To implement all logic gates using VHDL.
9

To implement all logic gates using behavioral method
10

To implement eight different logic gates with the help of 3-bit selection line.
11

To implement all flip-flops (s-r, j-k, t, d) using.
12

To implement half adder with data flow, structural and behavioral method.
13

To implement full-adder with data flow, structural and behavioral method.
14

To implement 8:1 multiplexer.
15

To implement 2:4 line decoder.
16

To implement 4-bit adder.
17

To implement 4-bit comparator.
18

To implement BCD to 7-segment decoder using VHDL
19

To design sequence detector (a) Mealy model (b) Moore model